Semiconductor memory


PURPOSE: To prevent a soft error at the time of writing data while preventing a soft error of stored data by reducing a leakage current to a bit line of each memory cell, etc. CONSTITUTION: A substrate bias circuit 20 can reduce an absolute value of a substrate bias voltage at each memory cell block 12. A substrate bias voltage change selector 30 selects the block 12 corresponding to a memory cell to be selected at the time of writing data. The absolute value of the bias voltage of the block 12 corresponding to the cell to be written with the data is reduced by that circuit 20 the selector 30. Thus, a writing potential of the cell in which the data is written, is obtained. COPYRIGHT: (C)1992,JPO&Japio




Download Full PDF Version (Non-Commercial Use)

Patent Citations (0)

    Publication numberPublication dateAssigneeTitle

NO-Patent Citations (0)


Cited By (1)

    Publication numberPublication dateAssigneeTitle
    US-9310878-B2April 12, 2016Fujitsu LimitedPower gated and voltage biased memory circuit for reducing power